This invention relates to signal receiver systems and, more particularly, to circuitry within the receiver for transforming the input signal applied thereto into an appropriate one of two logic levels.
In optical transmission systems, information signals are typically transmitted over fiber optic lines as digital light pulses. These light pulses must be converted to voltage pulses for processing by the receiver system. Typically, the incoming light impinges on a photodetector which is coupled to the input of a preamplifier. The peak-to-peak output voltage of the preamplifier will typically lie in the range of 5 millivolts to almost 1.5 volts. This voltage must be amplified, an appropriate threshold must be determined, and the signal must be quantized with respect to this threshold to produce the appropriate one of two logic levels.
The above-mentioned threshold refers to the voltage level to which the incoming signal is compared to determine if a logic "1" or a logic "0" is being received. Since the optical transmission scheme is non return to zero (NRZ), these two conditions refer to "receiving light" and "receiving no light", respectively. During any given transmission period, this will define two distinct output voltage levels from the preamplifier. The magnitude of the output voltage is determined by the amount of optical flux illuminating the photodetector and the gain of the preamplifier. Because of the bandwidth of the fiber optic transmission medium and of the preamplifier, the original data square wave is reshaped into a sinusoidal wave. When the data is recovered, it is imperative that: (1) the proper logic level be chosen; and (2) the proper transition point be determined so that a clock signal can be recovered from the data stream. To achieve these results, the signal to noise ratio must be maximized for both the low and high levels of the degraded pulses. Accordingly, the switching threshold should be midway between the low and high peaks of the signal.
Traditionally, high speed digital fiber optic data systems have taken the approach of attempting to attain a 50% duty cycle for the logic levels in the data stream in order to simplify the data recovery circuitry. If the data stream has a 50% duty cycle, the optimum threshold voltage is determined by simply averaging the incoming signal level. To attain the 50% duty cycle, system designers have utilized various coding schemes. These coding schemes include biphase codes (i.e., Manchester coding), but such a coding scheme is highly inefficient in that the transmission bandwidth is twice the information band- width. To make more efficient use of the transmission bandwidth, substitution type coding schemes (i.e., four bit to five bit or eight bit to ten bit) are sometimes implemented. These codes can be designed to be statistically balanced, but in reality, they can have long durations where the duty cycle significantly differs from 50%. With the conventional "average value" detection receivers, the calculated threshold will not be at the midpoint of the incoming signal during these times.
If the threshold is not at the midpoint of the incoming signal, a number of detrimental effects will result. One such effect is that the quantized output pulses will have pulse width distortion due to the timing error resulting from the threshold moving up or down the rising and falling edges of the incoming signal pulse. Further, the sensitivity of the receiver is reduced. Sensitivity is a function of the signal to noise ratio between the threshold and the incoming signal. As the threshold is moved toward either voltage extreme of the incoming signal, the signal to noise ratio between them is reduced, increasing the probability of not properly detecting that pulse. Accordingly, it is a primary object of this invention to accurately define the midpoint of the incoming signal, so as to maximize the signal to noise ratio for both of the signal levels.
Other problems arise due to the levels of the incoming signal. As previously mentioned, the input signal can vary over at least a 20 db range (i.e., from 5 millivolts to 1.5 volts peak to peak), although during a single transmission period the range is substantially constant. Because of the low signal levels, amplification is required. In particular, it has been common to utilize a multi-stage amplifier which is AC coupled. This has the disadvantage that the capacitor between stages removes the DC information, so that in effect the system becomes an average value detector rather than one where the threshold is midway between the peaks. This is another reason why prior system designs have been constrained to attain a 50% duty cycle of the data stream. However, if the duty cycle varies from 50%, the peak values are important and cannot be clipped. It is therefore another object of this invention to provide a system where the signal is not clipped before quantizing is effected. This requires that higher level input signals are amplified less than lower level input signals.